lsm303agr_reg.h 35 KB

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  1. /*
  2. ******************************************************************************
  3. * @file lsm303agr_reg.h
  4. * @author MEMS Software Solution Team
  5. * @date 12-October-2017
  6. * @brief This file contains all the functions prototypes for the
  7. * lsm303agr_reg.c driver.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. */
  36. /* Define to prevent recursive inclusion -------------------------------------*/
  37. #ifndef __LSM303AGR_DRIVER__H
  38. #define __LSM303AGR_DRIVER__H
  39. #ifdef __cplusplus
  40. extern "C" {
  41. #endif
  42. /* Includes ------------------------------------------------------------------*/
  43. #include <stdint.h>
  44. #include <math.h>
  45. /** @addtogroup LSM303AGR
  46. * @{
  47. *
  48. */
  49. /** @defgroup LSM303AGR_sensors_common_types
  50. * @{
  51. *
  52. */
  53. #ifndef MEMS_SHARED_TYPES
  54. #define MEMS_SHARED_TYPES
  55. typedef union{
  56. int16_t i16bit[3];
  57. uint8_t u8bit[6];
  58. } axis3bit16_t;
  59. typedef union{
  60. int16_t i16bit;
  61. uint8_t u8bit[2];
  62. } axis1bit16_t;
  63. typedef union{
  64. int32_t i32bit[3];
  65. uint8_t u8bit[12];
  66. } axis3bit32_t;
  67. typedef union{
  68. int32_t i32bit;
  69. uint8_t u8bit[4];
  70. } axis1bit32_t;
  71. typedef struct{
  72. uint8_t bit0 : 1;
  73. uint8_t bit1 : 1;
  74. uint8_t bit2 : 1;
  75. uint8_t bit3 : 1;
  76. uint8_t bit4 : 1;
  77. uint8_t bit5 : 1;
  78. uint8_t bit6 : 1;
  79. uint8_t bit7 : 1;
  80. } bitwise_t;
  81. #define PROPERTY_DISABLE (0U)
  82. #define PROPERTY_ENABLE (1U)
  83. #endif /* MEMS_SHARED_TYPES */
  84. /**
  85. * @}
  86. *
  87. */
  88. /** @defgroup lsm303agr_interface
  89. * @{
  90. */
  91. typedef int32_t (*lsm303agr_write_ptr)(void *, uint8_t, uint8_t*, uint16_t);
  92. typedef int32_t (*lsm303agr_read_ptr) (void *, uint8_t, uint8_t*, uint16_t);
  93. typedef struct {
  94. /** Component mandatory fields **/
  95. lsm303agr_write_ptr write_reg;
  96. lsm303agr_read_ptr read_reg;
  97. /** Customizable optional pointer **/
  98. void *handle;
  99. } lsm303agr_ctx_t;
  100. /**
  101. * @}
  102. */
  103. /** @defgroup lsm303agr_Infos
  104. * @{
  105. */
  106. /** I2C Device Address 8 bit format**/
  107. #define LSM303AGR_I2C_ADD_XL 0x33
  108. #define LSM303AGR_I2C_ADD_MG 0x3D
  109. /** Device Identification (Who am I) **/
  110. #define LSM303AGR_ID_XL 0x41
  111. #define LSM303AGR_ID_MG 0x40
  112. /**
  113. * @}
  114. */
  115. /**
  116. * @defgroup lsm303agr_Sensitivity
  117. * @{
  118. */
  119. #define LSM303AGR_FROM_FS_2g_HR_TO_mg(lsb) (float)((int16_t)lsb>>4)* 1.0f
  120. #define LSM303AGR_FROM_FS_4g_HR_TO_mg(lsb) (float)((int16_t)lsb>>4)* 2.0f
  121. #define LSM303AGR_FROM_FS_8g_HR_TO_mg(lsb) (float)((int16_t)lsb>>4)* 4.0f
  122. #define LSM303AGR_FROM_FS_16g_HR_TO_mg(lsb) (float)((int16_t)lsb>>4)*12.0f
  123. #define LSM303AGR_FROM_LSB_TO_degC_HR(lsb) (float)((int16_t)lsb>>6)/4.0f+25.0f
  124. #define LSM303AGR_FROM_FS_2g_NM_TO_mg(lsb) (float)((int16_t)lsb>>6)* 4.0f
  125. #define LSM303AGR_FROM_FS_4g_NM_TO_mg(lsb) (float)((int16_t)lsb>>6)* 8.0f
  126. #define LSM303AGR_FROM_FS_8g_NM_TO_mg(lsb) (float)((int16_t)lsb>>6)* 16.0f
  127. #define LSM303AGR_FROM_FS_16g_NM_TO_mg(lsb) (float)((int16_t)lsb>>6)* 48.0f
  128. #define LSM303AGR_FROM_LSB_TO_degC_NM(lsb) (float)((int16_t)lsb>>6)/4.0f+25.0f
  129. #define LSM303AGR_FROM_FS_2g_LP_TO_mg(lsb) (float)((int16_t)lsb>>8)*16.0f
  130. #define LSM303AGR_FROM_FS_4g_LP_TO_mg(lsb) (float)((int16_t)lsb>>8)*32.0f
  131. #define LSM303AGR_FROM_FS_8g_LP_TO_mg(lsb) (float)((int16_t)lsb>>8)*64.0f
  132. #define LSM303AGR_FROM_FS_16g_LP_TO_mg(lsb) (float)((int16_t)lsb>>8)*192.0f
  133. #define LSM303AGR_FROM_LSB_TO_mG(lsb) (float)(lsb * 1.5f)
  134. #define LSM303AGR_FROM_LSB_TO_degC_LP(lsb) (float)((int16_t)lsb>>8)*1.0f + 25.0f
  135. /**
  136. * @}
  137. */
  138. #define LSM303AGR_STATUS_REG_AUX_A 0x07
  139. typedef struct {
  140. uint8_t not_used_01 : 2;
  141. uint8_t tda : 1;
  142. uint8_t not_used_02 : 3;
  143. uint8_t tor : 1;
  144. uint8_t not_used_03 : 1;
  145. } lsm303agr_status_reg_aux_a_t;
  146. #define LSM303AGR_OUT_TEMP_L_A 0x0C
  147. #define LSM303AGR_OUT_TEMP_H_A 0x0D
  148. #define LSM303AGR_INT_COUNTER_REG_A 0x0E
  149. #define LSM303AGR_WHO_AM_I_A 0x0F
  150. #define LSM303AGR_TEMP_CFG_REG_A 0x1F
  151. typedef struct {
  152. uint8_t not_used_01 : 6;
  153. uint8_t temp_en : 2;
  154. } lsm303agr_temp_cfg_reg_a_t;
  155. #define LSM303AGR_CTRL_REG1_A 0x20
  156. typedef struct {
  157. uint8_t xen : 1;
  158. uint8_t yen : 1;
  159. uint8_t zen : 1;
  160. uint8_t lpen : 1;
  161. uint8_t odr : 4;
  162. } lsm303agr_ctrl_reg1_a_t;
  163. #define LSM303AGR_CTRL_REG2_A 0x21
  164. typedef struct {
  165. uint8_t hp : 3; /* HPCLICK + HPIS2 + HPIS1 -> HP */
  166. uint8_t fds : 1;
  167. uint8_t hpcf : 2;
  168. uint8_t hpm : 2;
  169. } lsm303agr_ctrl_reg2_a_t;
  170. #define LSM303AGR_CTRL_REG3_A 0x22
  171. typedef struct {
  172. uint8_t not_used_01 : 1;
  173. uint8_t i1_overrun : 1;
  174. uint8_t i1_wtm : 1;
  175. uint8_t i1_drdy2 : 1;
  176. uint8_t i1_drdy1 : 1;
  177. uint8_t i1_aoi2 : 1;
  178. uint8_t i1_aoi1 : 1;
  179. uint8_t i1_click : 1;
  180. } lsm303agr_ctrl_reg3_a_t;
  181. #define LSM303AGR_CTRL_REG4_A 0x23
  182. typedef struct {
  183. uint8_t spi_enable : 1;
  184. uint8_t st : 2;
  185. uint8_t hr : 1;
  186. uint8_t fs : 2;
  187. uint8_t ble : 1;
  188. uint8_t bdu : 1;
  189. } lsm303agr_ctrl_reg4_a_t;
  190. #define LSM303AGR_CTRL_REG5_A 0x24
  191. typedef struct {
  192. uint8_t d4d_int2 : 1;
  193. uint8_t lir_int2 : 1;
  194. uint8_t d4d_int1 : 1;
  195. uint8_t lir_int1 : 1;
  196. uint8_t not_used_01 : 2;
  197. uint8_t fifo_en : 1;
  198. uint8_t boot : 1;
  199. } lsm303agr_ctrl_reg5_a_t;
  200. #define LSM303AGR_CTRL_REG6_A 0x25
  201. typedef struct {
  202. uint8_t not_used_01 : 1;
  203. uint8_t h_lactive : 1;
  204. uint8_t not_used_02 : 1;
  205. uint8_t p2_act : 1;
  206. uint8_t boot_i2 : 1;
  207. uint8_t i2_int2 : 1;
  208. uint8_t i2_int1 : 1;
  209. uint8_t i2_clicken : 1;
  210. } lsm303agr_ctrl_reg6_a_t;
  211. #define LSM303AGR_REFERENCE_A 0x26
  212. #define LSM303AGR_STATUS_REG_A 0x27
  213. typedef struct {
  214. uint8_t xda : 1;
  215. uint8_t yda : 1;
  216. uint8_t zda : 1;
  217. uint8_t zyxda : 1;
  218. uint8_t _xor : 1;
  219. uint8_t yor : 1;
  220. uint8_t zor : 1;
  221. uint8_t zyxor : 1;
  222. } lsm303agr_status_reg_a_t;
  223. #define LSM303AGR_OUT_X_L_A 0x28
  224. #define LSM303AGR_OUT_X_H_A 0x29
  225. #define LSM303AGR_OUT_Y_L_A 0x2A
  226. #define LSM303AGR_OUT_Y_H_A 0x2B
  227. #define LSM303AGR_OUT_Z_L_A 0x2C
  228. #define LSM303AGR_OUT_Z_H_A 0x2D
  229. #define LSM303AGR_FIFO_CTRL_REG_A 0x2E
  230. typedef struct {
  231. uint8_t fth : 5;
  232. uint8_t tr : 1;
  233. uint8_t fm : 2;
  234. } lsm303agr_fifo_ctrl_reg_a_t;
  235. #define LSM303AGR_FIFO_SRC_REG_A 0x2F
  236. typedef struct {
  237. uint8_t fss : 5;
  238. uint8_t empty : 1;
  239. uint8_t ovrn_fifo : 1;
  240. uint8_t wtm : 1;
  241. } lsm303agr_fifo_src_reg_a_t;
  242. #define LSM303AGR_INT1_CFG_A 0x30
  243. typedef struct {
  244. uint8_t xlie : 1; /* or XDOWNE */
  245. uint8_t xhie : 1; /* or XUPE */
  246. uint8_t ylie : 1; /* or YDOWNE */
  247. uint8_t yhie : 1; /* or YUPE */
  248. uint8_t zlie : 1; /* or ZDOWNE */
  249. uint8_t zhie : 1; /* or ZUPE */
  250. uint8_t _6d : 1;
  251. uint8_t aoi : 1;
  252. } lsm303agr_int1_cfg_a_t;
  253. #define LSM303AGR_INT1_SRC_A 0x31
  254. typedef struct {
  255. uint8_t xl : 1;
  256. uint8_t xh : 1;
  257. uint8_t yl : 1;
  258. uint8_t yh : 1;
  259. uint8_t zl : 1;
  260. uint8_t zh : 1;
  261. uint8_t ia : 1;
  262. uint8_t not_used_01 : 1;
  263. } lsm303agr_int1_src_a_t;
  264. #define LSM303AGR_INT1_THS_A 0x32
  265. typedef struct {
  266. uint8_t ths : 7;
  267. uint8_t not_used_01 : 1;
  268. } lsm303agr_int1_ths_a_t;
  269. #define LSM303AGR_INT1_DURATION_A 0x33
  270. typedef struct {
  271. uint8_t d : 7;
  272. uint8_t not_used_01 : 1;
  273. } lsm303agr_int1_duration_a_t;
  274. #define LSM303AGR_INT2_CFG_A 0x34
  275. typedef struct {
  276. uint8_t xlie : 1;
  277. uint8_t xhie : 1;
  278. uint8_t ylie : 1;
  279. uint8_t yhie : 1;
  280. uint8_t zlie : 1;
  281. uint8_t zhie : 1;
  282. uint8_t _6d : 1;
  283. uint8_t aoi : 1;
  284. } lsm303agr_int2_cfg_a_t;
  285. #define LSM303AGR_INT2_SRC_A 0x35
  286. typedef struct {
  287. uint8_t xl : 1;
  288. uint8_t xh : 1;
  289. uint8_t yl : 1;
  290. uint8_t yh : 1;
  291. uint8_t zl : 1;
  292. uint8_t zh : 1;
  293. uint8_t ia : 1;
  294. uint8_t not_used_01 : 1;
  295. } lsm303agr_int2_src_a_t;
  296. #define LSM303AGR_INT2_THS_A 0x36
  297. typedef struct {
  298. uint8_t ths : 7;
  299. uint8_t not_used_01 : 1;
  300. } lsm303agr_int2_ths_a_t;
  301. #define LSM303AGR_INT2_DURATION_A 0x37
  302. typedef struct {
  303. uint8_t d : 7;
  304. uint8_t not_used_01 : 1;
  305. } lsm303agr_int2_duration_a_t;
  306. #define LSM303AGR_CLICK_CFG_A 0x38
  307. typedef struct {
  308. uint8_t xs : 1;
  309. uint8_t xd : 1;
  310. uint8_t ys : 1;
  311. uint8_t yd : 1;
  312. uint8_t zs : 1;
  313. uint8_t zd : 1;
  314. uint8_t not_used_01 : 2;
  315. } lsm303agr_click_cfg_a_t;
  316. #define LSM303AGR_CLICK_SRC_A 0x39
  317. typedef struct {
  318. uint8_t x : 1;
  319. uint8_t y : 1;
  320. uint8_t z : 1;
  321. uint8_t sign : 1;
  322. uint8_t sclick : 1;
  323. uint8_t dclick : 1;
  324. uint8_t ia : 1;
  325. uint8_t not_used_01 : 1;
  326. } lsm303agr_click_src_a_t;
  327. #define LSM303AGR_CLICK_THS_A 0x3A
  328. typedef struct {
  329. uint8_t ths : 7;
  330. uint8_t not_used_01 : 1;
  331. } lsm303agr_click_ths_a_t;
  332. #define LSM303AGR_TIME_LIMIT_A 0x3B
  333. typedef struct {
  334. uint8_t tli : 7;
  335. uint8_t not_used_01 : 1;
  336. } lsm303agr_time_limit_a_t;
  337. #define LSM303AGR_TIME_LATENCY_A 0x3C
  338. typedef struct {
  339. uint8_t tla : 8;
  340. } lsm303agr_time_latency_a_t;
  341. #define LSM303AGR_TIME_WINDOW_A 0x3D
  342. typedef struct {
  343. uint8_t tw : 8;
  344. } lsm303agr_time_window_a_t;
  345. #define LSM303AGR_ACT_THS_A 0x3E
  346. typedef struct {
  347. uint8_t acth : 7;
  348. uint8_t not_used_01 : 1;
  349. } lsm303agr_act_ths_a_t;
  350. #define LSM303AGR_ACT_DUR_A 0x3F
  351. typedef struct {
  352. uint8_t actd : 8;
  353. } lsm303agr_act_dur_a_t;
  354. #define LSM303AGR_OFFSET_X_REG_L_M 0x45
  355. #define LSM303AGR_OFFSET_X_REG_H_M 0x46
  356. #define LSM303AGR_OFFSET_Y_REG_L_M 0x47
  357. #define LSM303AGR_OFFSET_Y_REG_H_M 0x48
  358. #define LSM303AGR_OFFSET_Z_REG_L_M 0x49
  359. #define LSM303AGR_OFFSET_Z_REG_H_M 0x4A
  360. #define LSM303AGR_WHO_AM_I_M 0x4F
  361. #define LSM303AGR_CFG_REG_A_M 0x60
  362. typedef struct {
  363. uint8_t md : 2;
  364. uint8_t odr : 2;
  365. uint8_t lp : 1;
  366. uint8_t soft_rst : 1;
  367. uint8_t reboot : 1;
  368. uint8_t comp_temp_en : 1;
  369. } lsm303agr_cfg_reg_a_m_t;
  370. #define LSM303AGR_CFG_REG_B_M 0x61
  371. typedef struct {
  372. uint8_t lpf : 1;
  373. uint8_t set_rst : 2; /* OFF_CANC + Set_FREQ */
  374. uint8_t int_on_dataoff : 1;
  375. uint8_t off_canc_one_shot : 1;
  376. uint8_t not_used_01 : 3;
  377. } lsm303agr_cfg_reg_b_m_t;
  378. #define LSM303AGR_CFG_REG_C_M 0x62
  379. typedef struct {
  380. uint8_t int_mag : 1;
  381. uint8_t self_test : 1;
  382. uint8_t not_used_01 : 1;
  383. uint8_t ble : 1;
  384. uint8_t bdu : 1;
  385. uint8_t i2c_dis : 1;
  386. uint8_t int_mag_pin : 1;
  387. uint8_t not_used_02 : 1;
  388. } lsm303agr_cfg_reg_c_m_t;
  389. #define LSM303AGR_INT_CRTL_REG_M 0x63
  390. typedef struct {
  391. uint8_t ien : 1;
  392. uint8_t iel : 1;
  393. uint8_t iea : 1;
  394. uint8_t not_used_01 : 2;
  395. uint8_t zien : 1;
  396. uint8_t yien : 1;
  397. uint8_t xien : 1;
  398. } lsm303agr_int_crtl_reg_m_t;
  399. #define LSM303AGR_INT_SOURCE_REG_M 0x64
  400. typedef struct {
  401. uint8_t _int : 1;
  402. uint8_t mroi : 1;
  403. uint8_t n_th_s_z : 1;
  404. uint8_t n_th_s_y : 1;
  405. uint8_t n_th_s_x : 1;
  406. uint8_t p_th_s_z : 1;
  407. uint8_t p_th_s_y : 1;
  408. uint8_t p_th_s_x : 1;
  409. } lsm303agr_int_source_reg_m_t;
  410. #define LSM303AGR_INT_THS_L_REG_M 0x65
  411. #define LSM303AGR_INT_THS_H_REG_M 0x66
  412. #define LSM303AGR_STATUS_REG_M 0x67
  413. typedef struct {
  414. uint8_t xda : 1;
  415. uint8_t yda : 1;
  416. uint8_t zda : 1;
  417. uint8_t zyxda : 1;
  418. uint8_t _xor : 1;
  419. uint8_t yor : 1;
  420. uint8_t zor : 1;
  421. uint8_t zyxor : 1;
  422. } lsm303agr_status_reg_m_t;
  423. #define LSM303AGR_OUTX_L_REG_M 0x68
  424. #define LSM303AGR_OUTX_H_REG_M 0x69
  425. #define LSM303AGR_OUTY_L_REG_M 0x6A
  426. #define LSM303AGR_OUTY_H_REG_M 0x6B
  427. #define LSM303AGR_OUTZ_L_REG_M 0x6C
  428. #define LSM303AGR_OUTZ_H_REG_M 0x6D
  429. typedef union{
  430. lsm303agr_status_reg_aux_a_t status_reg_aux_a;
  431. lsm303agr_temp_cfg_reg_a_t temp_cfg_reg_a;
  432. lsm303agr_ctrl_reg1_a_t ctrl_reg1_a;
  433. lsm303agr_ctrl_reg2_a_t ctrl_reg2_a;
  434. lsm303agr_ctrl_reg3_a_t ctrl_reg3_a;
  435. lsm303agr_ctrl_reg4_a_t ctrl_reg4_a;
  436. lsm303agr_ctrl_reg5_a_t ctrl_reg5_a;
  437. lsm303agr_ctrl_reg6_a_t ctrl_reg6_a;
  438. lsm303agr_status_reg_a_t status_reg_a;
  439. lsm303agr_fifo_ctrl_reg_a_t fifo_ctrl_reg_a;
  440. lsm303agr_fifo_src_reg_a_t fifo_src_reg_a;
  441. lsm303agr_int1_cfg_a_t int1_cfg_a;
  442. lsm303agr_int1_src_a_t int1_src_a;
  443. lsm303agr_int1_ths_a_t int1_ths_a;
  444. lsm303agr_int1_duration_a_t int1_duration_a;
  445. lsm303agr_int2_cfg_a_t int2_cfg_a;
  446. lsm303agr_int2_src_a_t int2_src_a;
  447. lsm303agr_int2_ths_a_t int2_ths_a;
  448. lsm303agr_int2_duration_a_t int2_duration_a;
  449. lsm303agr_click_cfg_a_t click_cfg_a;
  450. lsm303agr_click_src_a_t click_src_a;
  451. lsm303agr_click_ths_a_t click_ths_a;
  452. lsm303agr_time_limit_a_t time_limit_a;
  453. lsm303agr_time_latency_a_t time_latency_a;
  454. lsm303agr_time_window_a_t time_window_a;
  455. lsm303agr_act_ths_a_t act_ths_a;
  456. lsm303agr_act_dur_a_t act_dur_a;
  457. lsm303agr_cfg_reg_a_m_t cfg_reg_a_m;
  458. lsm303agr_cfg_reg_b_m_t cfg_reg_b_m;
  459. lsm303agr_cfg_reg_c_m_t cfg_reg_c_m;
  460. lsm303agr_int_crtl_reg_m_t int_crtl_reg_m;
  461. lsm303agr_int_source_reg_m_t int_source_reg_m;
  462. lsm303agr_status_reg_m_t status_reg_m;
  463. bitwise_t bitwise;
  464. uint8_t byte;
  465. } lsm303agr_reg_t;
  466. int32_t lsm303agr_read_reg(lsm303agr_ctx_t *ctx, uint8_t reg, uint8_t* data,
  467. uint16_t len);
  468. int32_t lsm303agr_write_reg(lsm303agr_ctx_t *ctx, uint8_t reg, uint8_t* data,
  469. uint16_t len);
  470. int32_t lsm303agr_temp_status_reg_get(lsm303agr_ctx_t *ctx, uint8_t *buff);
  471. int32_t lsm303agr_temp_data_ready_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  472. int32_t lsm303agr_temp_data_ovr_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  473. int32_t lsm303agr_temperature_raw_get(lsm303agr_ctx_t *ctx, uint8_t *buff);
  474. typedef enum {
  475. LSM303AGR_TEMP_DISABLE = 0,
  476. LSM303AGR_TEMP_ENABLE = 3,
  477. } lsm303agr_temp_en_a_t;
  478. int32_t lsm303agr_temperature_meas_set(lsm303agr_ctx_t *ctx,
  479. lsm303agr_temp_en_a_t val);
  480. int32_t lsm303agr_temperature_meas_get(lsm303agr_ctx_t *ctx,
  481. lsm303agr_temp_en_a_t *val);
  482. typedef enum {
  483. LSM303AGR_HR_12bit = 0,
  484. LSM303AGR_NM_10bit = 1,
  485. LSM303AGR_LP_8bit = 2,
  486. } lsm303agr_op_md_a_t;
  487. int32_t lsm303agr_xl_operating_mode_set(lsm303agr_ctx_t *ctx,
  488. lsm303agr_op_md_a_t val);
  489. int32_t lsm303agr_xl_operating_mode_get(lsm303agr_ctx_t *ctx,
  490. lsm303agr_op_md_a_t *val);
  491. typedef enum {
  492. LSM303AGR_XL_POWER_DOWN = 0,
  493. LSM303AGR_XL_ODR_1Hz = 1,
  494. LSM303AGR_XL_ODR_10Hz = 2,
  495. LSM303AGR_XL_ODR_25Hz = 3,
  496. LSM303AGR_XL_ODR_50Hz = 4,
  497. LSM303AGR_XL_ODR_100Hz = 5,
  498. LSM303AGR_XL_ODR_200Hz = 6,
  499. LSM303AGR_XL_ODR_400Hz = 7,
  500. LSM303AGR_XL_ODR_1kHz620_LP = 8,
  501. LSM303AGR_XL_ODR_5kHz376_LP = 9,
  502. LSM303AGR_XL_ODR_1kHz344_NM_HP = 9,
  503. } lsm303agr_odr_a_t;
  504. int32_t lsm303agr_xl_data_rate_set(lsm303agr_ctx_t *ctx,
  505. lsm303agr_odr_a_t val);
  506. int32_t lsm303agr_xl_data_rate_get(lsm303agr_ctx_t *ctx,
  507. lsm303agr_odr_a_t *val);
  508. int32_t lsm303agr_xl_high_pass_on_outputs_set(lsm303agr_ctx_t *ctx,
  509. uint8_t val);
  510. int32_t lsm303agr_xl_high_pass_on_outputs_get(lsm303agr_ctx_t *ctx,
  511. uint8_t *val);
  512. typedef enum {
  513. LSM303AGR_AGGRESSIVE = 0,
  514. LSM303AGR_STRONG = 1,
  515. LSM303AGR_MEDIUM = 2,
  516. LSM303AGR_LIGHT = 3,
  517. } lsm303agr_hpcf_a_t;
  518. int32_t lsm303agr_xl_high_pass_bandwidth_set(lsm303agr_ctx_t *ctx,
  519. lsm303agr_hpcf_a_t val);
  520. int32_t lsm303agr_xl_high_pass_bandwidth_get(lsm303agr_ctx_t *ctx,
  521. lsm303agr_hpcf_a_t *val);
  522. typedef enum {
  523. LSM303AGR_NORMAL_WITH_RST = 0,
  524. LSM303AGR_REFERENCE_MODE = 1,
  525. LSM303AGR_NORMAL = 2,
  526. LSM303AGR_AUTORST_ON_INT = 3,
  527. } lsm303agr_hpm_a_t;
  528. int32_t lsm303agr_xl_high_pass_mode_set(lsm303agr_ctx_t *ctx,
  529. lsm303agr_hpm_a_t val);
  530. int32_t lsm303agr_xl_high_pass_mode_get(lsm303agr_ctx_t *ctx,
  531. lsm303agr_hpm_a_t *val);
  532. typedef enum {
  533. LSM303AGR_2g = 0,
  534. LSM303AGR_4g = 1,
  535. LSM303AGR_8g = 2,
  536. LSM303AGR_16g = 3,
  537. } lsm303agr_fs_a_t;
  538. int32_t lsm303agr_xl_full_scale_set(lsm303agr_ctx_t *ctx,
  539. lsm303agr_fs_a_t val);
  540. int32_t lsm303agr_xl_full_scale_get(lsm303agr_ctx_t *ctx,
  541. lsm303agr_fs_a_t *val);
  542. int32_t lsm303agr_xl_block_data_update_set(lsm303agr_ctx_t *ctx, uint8_t val);
  543. int32_t lsm303agr_xl_block_data_update_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  544. int32_t lsm303agr_xl_filter_reference_set(lsm303agr_ctx_t *ctx, uint8_t *buff);
  545. int32_t lsm303agr_xl_filter_reference_get(lsm303agr_ctx_t *ctx, uint8_t *buff);
  546. int32_t lsm303agr_xl_data_ready_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  547. int32_t lsm303agr_xl_data_ovr_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  548. int32_t lsm303agr_acceleration_raw_get(lsm303agr_ctx_t *ctx, uint8_t *buff);
  549. int32_t lsm303agr_xl_device_id_get(lsm303agr_ctx_t *ctx, uint8_t *buff);
  550. typedef enum {
  551. LSM303AGR_ST_DISABLE = 0,
  552. LSM303AGR_ST_POSITIVE = 1,
  553. LSM303AGR_ST_NEGATIVE = 2,
  554. } lsm303agr_st_a_t;
  555. int32_t lsm303agr_xl_self_test_set(lsm303agr_ctx_t *ctx,
  556. lsm303agr_st_a_t val);
  557. int32_t lsm303agr_xl_self_test_get(lsm303agr_ctx_t *ctx,
  558. lsm303agr_st_a_t *val);
  559. typedef enum {
  560. LSM303AGR_XL_LSB_AT_LOW_ADD = 0,
  561. LSM303AGR_XL_MSB_AT_LOW_ADD = 1,
  562. } lsm303agr_ble_a_t;
  563. int32_t lsm303agr_xl_data_format_set(lsm303agr_ctx_t *ctx,
  564. lsm303agr_ble_a_t val);
  565. int32_t lsm303agr_xl_data_format_get(lsm303agr_ctx_t *ctx,
  566. lsm303agr_ble_a_t *val);
  567. int32_t lsm303agr_xl_boot_set(lsm303agr_ctx_t *ctx, uint8_t val);
  568. int32_t lsm303agr_xl_boot_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  569. int32_t lsm303agr_xl_status_get(lsm303agr_ctx_t *ctx,
  570. lsm303agr_status_reg_a_t *val);
  571. int32_t lsm303agr_xl_int1_gen_conf_set(lsm303agr_ctx_t *ctx,
  572. lsm303agr_int1_cfg_a_t *val);
  573. int32_t lsm303agr_xl_int1_gen_conf_get(lsm303agr_ctx_t *ctx,
  574. lsm303agr_int1_cfg_a_t *val);
  575. int32_t lsm303agr_xl_int1_gen_source_get(lsm303agr_ctx_t *ctx,
  576. lsm303agr_int1_src_a_t *val);
  577. int32_t lsm303agr_xl_int1_gen_threshold_set(lsm303agr_ctx_t *ctx,
  578. uint8_t val);
  579. int32_t lsm303agr_xl_int1_gen_threshold_get(lsm303agr_ctx_t *ctx,
  580. uint8_t *val);
  581. int32_t lsm303agr_xl_int1_gen_duration_set(lsm303agr_ctx_t *ctx,
  582. uint8_t val);
  583. int32_t lsm303agr_xl_int1_gen_duration_get(lsm303agr_ctx_t *ctx,
  584. uint8_t *val);
  585. int32_t lsm303agr_xl_int2_gen_conf_set(lsm303agr_ctx_t *ctx,
  586. lsm303agr_int2_cfg_a_t *val);
  587. int32_t lsm303agr_xl_int2_gen_conf_get(lsm303agr_ctx_t *ctx,
  588. lsm303agr_int2_cfg_a_t *val);
  589. int32_t lsm303agr_xl_int2_gen_source_get(lsm303agr_ctx_t *ctx,
  590. lsm303agr_int2_src_a_t *val);
  591. int32_t lsm303agr_xl_int2_gen_threshold_set(lsm303agr_ctx_t *ctx,
  592. uint8_t val);
  593. int32_t lsm303agr_xl_int2_gen_threshold_get(lsm303agr_ctx_t *ctx,
  594. uint8_t *val);
  595. int32_t lsm303agr_xl_int2_gen_duration_set(lsm303agr_ctx_t *ctx,
  596. uint8_t val);
  597. int32_t lsm303agr_xl_int2_gen_duration_get(lsm303agr_ctx_t *ctx,
  598. uint8_t *val);
  599. typedef enum {
  600. LSM303AGR_DISC_FROM_INT_GENERATOR = 0,
  601. LSM303AGR_ON_INT1_GEN = 1,
  602. LSM303AGR_ON_INT2_GEN = 2,
  603. LSM303AGR_ON_TAP_GEN = 4,
  604. LSM303AGR_ON_INT1_INT2_GEN = 3,
  605. LSM303AGR_ON_INT1_TAP_GEN = 5,
  606. LSM303AGR_ON_INT2_TAP_GEN = 6,
  607. LSM303AGR_ON_INT1_INT2_TAP_GEN = 7,
  608. } lsm303agr_hp_a_t;
  609. int32_t lsm303agr_xl_high_pass_int_conf_set(lsm303agr_ctx_t *ctx,
  610. lsm303agr_hp_a_t val);
  611. int32_t lsm303agr_xl_high_pass_int_conf_get(lsm303agr_ctx_t *ctx,
  612. lsm303agr_hp_a_t *val);
  613. int32_t lsm303agr_xl_pin_int1_config_set(lsm303agr_ctx_t *ctx,
  614. lsm303agr_ctrl_reg3_a_t *val);
  615. int32_t lsm303agr_xl_pin_int1_config_get(lsm303agr_ctx_t *ctx,
  616. lsm303agr_ctrl_reg3_a_t *val);
  617. int32_t lsm303agr_xl_int2_pin_detect_4d_set(lsm303agr_ctx_t *ctx,
  618. uint8_t val);
  619. int32_t lsm303agr_xl_int2_pin_detect_4d_get(lsm303agr_ctx_t *ctx,
  620. uint8_t *val);
  621. typedef enum {
  622. LSM303AGR_INT2_PULSED = 0,
  623. LSM303AGR_INT2_LATCHED = 1,
  624. } lsm303agr_lir_int2_a_t;
  625. int32_t lsm303agr_xl_int2pin_notification_mode_set(lsm303agr_ctx_t *ctx,
  626. lsm303agr_lir_int2_a_t val);
  627. int32_t lsm303agr_xl_int2pin_notification_mode_get(lsm303agr_ctx_t *ctx,
  628. lsm303agr_lir_int2_a_t *val);
  629. int32_t lsm303agr_xl_int1_pin_detect_4d_set(lsm303agr_ctx_t *ctx,
  630. uint8_t val);
  631. int32_t lsm303agr_xl_int1_pin_detect_4d_get(lsm303agr_ctx_t *ctx,
  632. uint8_t *val);
  633. typedef enum {
  634. LSM303AGR_INT1_PULSED = 0,
  635. LSM303AGR_INT1_LATCHED = 1,
  636. } lsm303agr_lir_int1_a_t;
  637. int32_t lsm303agr_xl_int1pin_notification_mode_set(lsm303agr_ctx_t *ctx,
  638. lsm303agr_lir_int1_a_t val);
  639. int32_t lsm303agr_xl_int1pin_notification_mode_get(lsm303agr_ctx_t *ctx,
  640. lsm303agr_lir_int1_a_t *val);
  641. int32_t lsm303agr_xl_pin_int2_config_set(lsm303agr_ctx_t *ctx,
  642. lsm303agr_ctrl_reg6_a_t *val);
  643. int32_t lsm303agr_xl_pin_int2_config_get(lsm303agr_ctx_t *ctx,
  644. lsm303agr_ctrl_reg6_a_t *val);
  645. int32_t lsm303agr_xl_fifo_set(lsm303agr_ctx_t *ctx, uint8_t val);
  646. int32_t lsm303agr_xl_fifo_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  647. int32_t lsm303agr_xl_fifo_watermark_set(lsm303agr_ctx_t *ctx, uint8_t val);
  648. int32_t lsm303agr_xl_fifo_watermark_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  649. typedef enum {
  650. LSM303AGR_INT1_GEN = 0,
  651. LSM303AGR_INT2_GEN = 1,
  652. } lsm303agr_tr_a_t;
  653. int32_t lsm303agr_xl_fifo_trigger_event_set(lsm303agr_ctx_t *ctx,
  654. lsm303agr_tr_a_t val);
  655. int32_t lsm303agr_xl_fifo_trigger_event_get(lsm303agr_ctx_t *ctx,
  656. lsm303agr_tr_a_t *val);
  657. typedef enum {
  658. LSM303AGR_BYPASS_MODE = 0,
  659. LSM303AGR_FIFO_MODE = 1,
  660. LSM303AGR_DYNAMIC_STREAM_MODE = 2,
  661. LSM303AGR_STREAM_TO_FIFO_MODE = 3,
  662. } lsm303agr_fm_a_t;
  663. int32_t lsm303agr_xl_fifo_mode_set(lsm303agr_ctx_t *ctx,
  664. lsm303agr_fm_a_t val);
  665. int32_t lsm303agr_xl_fifo_mode_get(lsm303agr_ctx_t *ctx,
  666. lsm303agr_fm_a_t *val);
  667. int32_t lsm303agr_xl_fifo_status_get(lsm303agr_ctx_t *ctx,
  668. lsm303agr_fifo_src_reg_a_t *val);
  669. int32_t lsm303agr_xl_fifo_data_level_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  670. int32_t lsm303agr_xl_fifo_empty_flag_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  671. int32_t lsm303agr_xl_fifo_ovr_flag_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  672. int32_t lsm303agr_xl_fifo_fth_flag_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  673. int32_t lsm303agr_tap_conf_set(lsm303agr_ctx_t *ctx,
  674. lsm303agr_click_cfg_a_t *val);
  675. int32_t lsm303agr_tap_conf_get(lsm303agr_ctx_t *ctx,
  676. lsm303agr_click_cfg_a_t *val);
  677. int32_t lsm303agr_tap_source_get(lsm303agr_ctx_t *ctx,
  678. lsm303agr_click_src_a_t *val);
  679. int32_t lsm303agr_tap_threshold_set(lsm303agr_ctx_t *ctx, uint8_t val);
  680. int32_t lsm303agr_tap_threshold_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  681. int32_t lsm303agr_shock_dur_set(lsm303agr_ctx_t *ctx, uint8_t val);
  682. int32_t lsm303agr_shock_dur_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  683. int32_t lsm303agr_quiet_dur_set(lsm303agr_ctx_t *ctx, uint8_t val);
  684. int32_t lsm303agr_quiet_dur_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  685. int32_t lsm303agr_double_tap_timeout_set(lsm303agr_ctx_t *ctx,
  686. uint8_t val);
  687. int32_t lsm303agr_double_tap_timeout_get(lsm303agr_ctx_t *ctx,
  688. uint8_t *val);
  689. int32_t lsm303agr_act_threshold_set(lsm303agr_ctx_t *ctx, uint8_t val);
  690. int32_t lsm303agr_act_threshold_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  691. int32_t lsm303agr_act_timeout_set(lsm303agr_ctx_t *ctx, uint8_t val);
  692. int32_t lsm303agr_act_timeout_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  693. typedef enum {
  694. LSM303AGR_SPI_4_WIRE = 0,
  695. LSM303AGR_SPI_3_WIRE = 1,
  696. } lsm303agr_sim_a_t;
  697. int32_t lsm303agr_xl_spi_mode_set(lsm303agr_ctx_t *ctx,
  698. lsm303agr_sim_a_t val);
  699. int32_t lsm303agr_xl_spi_mode_get(lsm303agr_ctx_t *ctx,
  700. lsm303agr_sim_a_t *val);
  701. int32_t lsm303agr_mag_user_offset_set(lsm303agr_ctx_t *ctx,
  702. uint8_t *buff);
  703. int32_t lsm303agr_mag_user_offset_get(lsm303agr_ctx_t *ctx,
  704. uint8_t *buff);
  705. typedef enum {
  706. LSM303AGR_CONTINUOUS_MODE = 0,
  707. LSM303AGR_SINGLE_TRIGGER = 1,
  708. LSM303AGR_POWER_DOWN = 2,
  709. } lsm303agr_md_m_t;
  710. int32_t lsm303agr_mag_operating_mode_set(lsm303agr_ctx_t *ctx,
  711. lsm303agr_md_m_t val);
  712. int32_t lsm303agr_mag_operating_mode_get(lsm303agr_ctx_t *ctx,
  713. lsm303agr_md_m_t *val);
  714. typedef enum {
  715. LSM303AGR_MG_ODR_10Hz = 0,
  716. LSM303AGR_MG_ODR_20Hz = 1,
  717. LSM303AGR_MG_ODR_50Hz = 2,
  718. LSM303AGR_MG_ODR_100Hz = 3,
  719. } lsm303agr_mg_odr_m_t;
  720. int32_t lsm303agr_mag_data_rate_set(lsm303agr_ctx_t *ctx,
  721. lsm303agr_mg_odr_m_t val);
  722. int32_t lsm303agr_mag_data_rate_get(lsm303agr_ctx_t *ctx,
  723. lsm303agr_mg_odr_m_t *val);
  724. typedef enum {
  725. LSM303AGR_HIGH_RESOLUTION = 0,
  726. LSM303AGR_LOW_POWER = 1,
  727. } lsm303agr_lp_m_t;
  728. int32_t lsm303agr_mag_power_mode_set(lsm303agr_ctx_t *ctx,
  729. lsm303agr_lp_m_t val);
  730. int32_t lsm303agr_mag_power_mode_get(lsm303agr_ctx_t *ctx,
  731. lsm303agr_lp_m_t *val);
  732. int32_t lsm303agr_mag_offset_temp_comp_set(lsm303agr_ctx_t *ctx,
  733. uint8_t val);
  734. int32_t lsm303agr_mag_offset_temp_comp_get(lsm303agr_ctx_t *ctx,
  735. uint8_t *val);
  736. typedef enum {
  737. LSM303AGR_ODR_DIV_2 = 0,
  738. LSM303AGR_ODR_DIV_4 = 1,
  739. } lsm303agr_lpf_m_t;
  740. int32_t lsm303agr_mag_low_pass_bandwidth_set(lsm303agr_ctx_t *ctx,
  741. lsm303agr_lpf_m_t val);
  742. int32_t lsm303agr_mag_low_pass_bandwidth_get(lsm303agr_ctx_t *ctx,
  743. lsm303agr_lpf_m_t *val);
  744. typedef enum {
  745. LSM303AGR_SET_SENS_ODR_DIV_63 = 0,
  746. LSM303AGR_SENS_OFF_CANC_EVERY_ODR = 1,
  747. LSM303AGR_SET_SENS_ONLY_AT_POWER_ON = 2,
  748. } lsm303agr_set_rst_m_t;
  749. int32_t lsm303agr_mag_set_rst_mode_set(lsm303agr_ctx_t *ctx,
  750. lsm303agr_set_rst_m_t val);
  751. int32_t lsm303agr_mag_set_rst_mode_get(lsm303agr_ctx_t *ctx,
  752. lsm303agr_set_rst_m_t *val);
  753. int32_t lsm303agr_mag_set_rst_sensor_single_set(lsm303agr_ctx_t *ctx,
  754. uint8_t val);
  755. int32_t lsm303agr_mag_set_rst_sensor_single_get(lsm303agr_ctx_t *ctx,
  756. uint8_t *val);
  757. int32_t lsm303agr_mag_block_data_update_set(lsm303agr_ctx_t *ctx,
  758. uint8_t val);
  759. int32_t lsm303agr_mag_block_data_update_get(lsm303agr_ctx_t *ctx,
  760. uint8_t *val);
  761. int32_t lsm303agr_mag_data_ready_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  762. int32_t lsm303agr_mag_data_ovr_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  763. int32_t lsm303agr_magnetic_raw_get(lsm303agr_ctx_t *ctx, uint8_t *buff);
  764. int32_t lsm303agr_mag_device_id_get(lsm303agr_ctx_t *ctx, uint8_t *buff);
  765. int32_t lsm303agr_mag_reset_set(lsm303agr_ctx_t *ctx, uint8_t val);
  766. int32_t lsm303agr_mag_reset_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  767. int32_t lsm303agr_mag_boot_set(lsm303agr_ctx_t *ctx, uint8_t val);
  768. int32_t lsm303agr_mag_boot_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  769. int32_t lsm303agr_mag_self_test_set(lsm303agr_ctx_t *ctx,
  770. uint8_t val);
  771. int32_t lsm303agr_mag_self_test_get(lsm303agr_ctx_t *ctx,
  772. uint8_t *val);
  773. typedef enum {
  774. LSM303AGR_MG_LSB_AT_LOW_ADD = 0,
  775. LSM303AGR_MG_MSB_AT_LOW_ADD = 1,
  776. } lsm303agr_ble_m_t;
  777. int32_t lsm303agr_mag_data_format_set(lsm303agr_ctx_t *ctx,
  778. lsm303agr_ble_m_t val);
  779. int32_t lsm303agr_mag_data_format_get(lsm303agr_ctx_t *ctx,
  780. lsm303agr_ble_m_t *val);
  781. int32_t lsm303agr_mag_status_get(lsm303agr_ctx_t *ctx,
  782. lsm303agr_status_reg_m_t *val);
  783. typedef enum {
  784. LSM303AGR_CHECK_BEFORE = 0,
  785. LSM303AGR_CHECK_AFTER = 1,
  786. } lsm303agr_int_on_dataoff_m_t;
  787. int32_t lsm303agr_mag_offset_int_conf_set(lsm303agr_ctx_t *ctx,
  788. lsm303agr_int_on_dataoff_m_t val);
  789. int32_t lsm303agr_mag_offset_int_conf_get(lsm303agr_ctx_t *ctx,
  790. lsm303agr_int_on_dataoff_m_t *val);
  791. int32_t lsm303agr_mag_drdy_on_pin_set(lsm303agr_ctx_t *ctx, uint8_t val);
  792. int32_t lsm303agr_mag_drdy_on_pin_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  793. int32_t lsm303agr_mag_int_on_pin_set(lsm303agr_ctx_t *ctx, uint8_t val);
  794. int32_t lsm303agr_mag_int_on_pin_get(lsm303agr_ctx_t *ctx, uint8_t *val);
  795. int32_t lsm303agr_mag_int_gen_conf_set(lsm303agr_ctx_t *ctx,
  796. lsm303agr_int_crtl_reg_m_t *val);
  797. int32_t lsm303agr_mag_int_gen_conf_get(lsm303agr_ctx_t *ctx,
  798. lsm303agr_int_crtl_reg_m_t *val);
  799. int32_t lsm303agr_mag_int_gen_source_get(lsm303agr_ctx_t *ctx,
  800. lsm303agr_int_source_reg_m_t *val);
  801. int32_t lsm303agr_mag_int_gen_treshold_set(lsm303agr_ctx_t *ctx,
  802. uint8_t *buff);
  803. int32_t lsm303agr_mag_int_gen_treshold_get(lsm303agr_ctx_t *ctx,
  804. uint8_t *buff);
  805. typedef enum {
  806. LSM303AGR_I2C_ENABLE = 0,
  807. LSM303AGR_I2C_DISABLE = 1,
  808. } lsm303agr_i2c_dis_m_t;
  809. int32_t lsm303agr_mag_i2c_interface_set(lsm303agr_ctx_t *ctx,
  810. lsm303agr_i2c_dis_m_t val);
  811. int32_t lsm303agr_mag_i2c_interface_get(lsm303agr_ctx_t *ctx,
  812. lsm303agr_i2c_dis_m_t *val);
  813. /**
  814. * @}
  815. */
  816. #ifdef __cplusplus
  817. }
  818. #endif
  819. #endif /*__LSM303AGR_DRIVER__H */
  820. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/